Next: Bus Combiner Module
 Up: Mixer Unit
 Previous: Audio Input Module
     Contents 
 
 
 
Mix Module
The VHDL code used to synthesize the logic for the mix module address
decode GAL is shown below:
-----------------------------------------------------------------------------
-- DACS : Distributed Audio Control System
--
-- Copyright (C) 1997 Stephen Scott Richardson
-----------------------------------------------------------------------------
--   File: mix-1.vhd
--   Date: 03.13.97
-- Target: Atmel ATF16V8B
-----------------------------------------------------------------------------
-- Mix board pbus address decoding GAL
-- first mix board
--
-- pbus addx    function          dir (from uC)
-- ==================================================
-- 0x10         latch ena         out
-----------------------------------------------------------------------------
ENTITY mix_decode IS
	PORT (
		addx_in         :  IN bit_vector (6 DOWNTO 0);
		nlatch_in	:  IN bit;		
		nread_write_in	:  IN bit;
		data_ena_out    :  OUT bit;
                nsense_out      :  OUT bit
             );
-- force part and pinout
ATTRIBUTE part_name of mix_decode:entity is "C16V8";
ATTRIBUTE pin_numbers of mix_decode:entity is
	  "nread_write_in:1 nlatch_in:2 addx_in(0):3 addx_in(1):4
           addx_in(2):5 addx_in(3):6 addx_in(4):7 addx_in(5):8
           addx_in(6):9 nsense_out:12 data_ena_out:13";
END mix_decode;
ARCHITECTURE behavior OF mix_decode IS
BEGIN
	PROCESS (nlatch_in, addx_in, nread_write_in)
	BEGIN
		IF nlatch_in = '0' AND nread_write_in = '1'
		   AND addx_in = "0010000" THEN
			
			-- pbus 0x10
			nsense_out <= '0';     -- pbus nsense ACTIVE
			data_ena_out <= '1';   -- data latch ena ACTIVE
		ELSE
			-- not active
			nsense_out <= '1';     -- pbus nsense ACTIVE
			data_ena_out <= '0';   -- data latch ena INACTIVE
		END IF;
	END PROCESS;
END behavior;
The pinout for the mixer module decode GAL is shown below:
                     C16V8A
                 _______________
 nread_write_in =| 1|       |20|* not used       
      nlatch_in =| 2|       |19|* not used       
      addx_in_0 =| 3|       |18|* not used       
      addx_in_1 =| 4|       |17|* not used       
      addx_in_2 =| 5|       |16|* not used       
      addx_in_3 =| 6|       |15|* not used       
      addx_in_4 =| 7|       |14|* not used       
      addx_in_5 =| 8|       |13|= data_ena_out   
      addx_in_6 =| 9|       |12|= nsense_out     
       not used *|10|       |11|* not used       
                 _______________
  
Steve Richardson
2000-07-06
 |